Multiple PSP

This MotoHawk™ block allows multiple crank angle synchronous pulses to be created on a single output resource.

Block ID

Multiple PSP

Library

MotoHawk_lib/Advanced Digital I/O

Description

This MotoHawk™ block allows multiple crank angle synchronous pulses to be created on a single capable output resource as defined by the "Number of Pulses" parameter. These pulses must be located about the cycle in ascending order. Pulses may be missed if this condition is not met.

That is to say pulse #1, when enabled, must start and complete before pulse #2 could be scheduled. Consider this example where pulse #1 happens to end 100 crank angle degrees after firing TDC (degAfTDC) and pulse #2 is scheduled to start at 90 degAfTDC. MotoHawk™ would only attempt to schedule pulse #2 when pulse #1 completes, which is at 100 degAfTDC in this example. Pulse #2 would have started had pulse #1 finished earlier, but it didn't and so pulse #2 won't occur for nearly a full revolution because MotoHawk™ is now only looking for the 90 degAfTDC start marker. If there happened to be a pulse #3 then that would be missed while MotoHawk™ was scheduling pulse #2.

Not all modules fully support the functionality detailed here. See MultiplePSP module specific considerations for more information. The total number of pulses that can be supported is also hardware dependent. Many implementations support at least 16 pulses, but the actual limit is driven by the capability of the hardware. MPC5xxx based implementations support many more than 16.

Angle Domain Timings

Note that the angle domain timings are specified in after crank angle degrees. Some other Motohawk™ PSP blocks use before TDC timings. Before TDC timings can be converted into after TDC timings by simply negating the value. So 710  degBfTDC is equivalent to -710 degAfTDC, which is equivalent to 10 degAfTDC (assuming a 4-stroke).

Motohawk™ will also internally manage cycle wrap around because it works in cycle modulus numbers. So a timing of 730 degAfTDC is equivalent to 10 degAfTDC. This does mean that a pulse can't be delayed by one cycle by simply changing its timing from 10 degAfTDC to 730 degAfTDC.

Modes and Signal Timing

This block supplies two stop events, one specified in the angle domain, and one specified in the time domain. Both of these timings can terminate a pulse, but one of the timings is considered dominant. The dominant timing is defined by the chosen mode. In the Hard Start/Hard Stop mode the angle domain stop timing is considered dominant. In the Hard Start/Hard Duration mode the stop duration is considered dominant. The best control precision is always allocated to the dominant timing. Most implementations will treat each stop timing with equal weight. The mode just allows the application to communicate the more important timing to Motohawk™.

Preventing Overlap

As has been discussed, pulses may not overlap. The Multiple PSP Motohawk™ block offers a mechanism to prevent overlap. Have the block employ the Hard Start/Hard Duration mode and then use the angle domain stop timing to frame where the pulse must complete in order for it to not overlap with the start of the next pulse. Consider that pulse #2 is scheduled to start at 60 degAfTDC. If the angle domain stop timing of pulse #1 was set to 55 degAfTDC then pulse #1 will always complete before pulse #2 is scheduled to start, even if too much duration is asked for.

How a change in timing affects a pulse that is already active is dependent upon the capability of the module in use. See Module Specific Multiple PSP Update behavior.

Block Parameters

Parameter Field Values Comments/Description
Name Alpha-numeric text, single-quote enclosed Name as displayed in block for reference. Should be unique and C-legal (no special characters such as spaces, dashes or commas (underscore allowed).
Pin Drop-down list Select Pin resource for this block.
Number of Pulses Integer 1 or greater Enter value for number of pulses.
Mode  Select method for Start/Stop
Hard Start/Hard Stop The stop angle is considered the dominant timing. See Modes and Signal Timing
Hard Start/Hard Duration Stop Time Duration is considered the dominant timing. See Modes and Signal Timing
TDC Reference Unsigned integer The timings are associated to a particular engine TDC (e.g. TDC#1, TDC#2..) by setting the TDC Reference to the engine cylinder number. They can be treated as absolute by setting TDC Reference to zero. An absolute timing is synonymous with adding 0degAfTDC to the timing (but there is not a physical addition executed). It translates to engine TDC#1 when engine TDC#1 has been configured to 0degAfTDC via the TDC firing order array.
Optimize eTPU Memory by sacrificing some CPU performance Checkbox When checked the underlying PSP driver will take steps to conserve the amount of eTPU parameter RAM that is required to implement this resource. The eTPU parameter RAM consumed by a resource is proportional to the number of pulses that are declared. The optimization sacrifices some CPU execution bandwidth and consumes additional general purpose CPU RAM in order to fix the amount of eTPU parameter RAM consumed by the driver (instead of it being proportional to the number of declared pulses). The use of this option only makes sense if the application declares many pulses and has many other eTPU based resources such that eTPU parameter RAM consumed approaches the total amount available.

The transient performance of the pulse Enable/Disable is less capable than the standard version (it can take longer for a pulse to disable). It is recommended that a zero duration is applied instead of a pulse disable for situations where the pulse will be re-enabled on a subsequent cycle.

The eTPU_RAMBytesFree variable can be monitored via a suitable tool to determine whether the application is approaching the module's available eTPU parameter RAM.

This option is only applicable for resources that support eTPU memory optimization. The option will not be visible if the resource does not support this option.