TPU
The Time Processor Unit (TPU), is co-processor on the MPC5xx microcontroller family that is used to implement the majority of the module's IO. The TPU is optimized to handle timer like functions, which frees up execution on the core MPC5xx based microcontroller. The MPC5xx has two, and sometimes three, of these co-processors. MotoHawk abstracts the usage of the TPU, but some restrictions on IO usage result from channel allocation. Some blocks like the Mux PSP considerations consume neighbouring channels, and others like Synchronized PWM Child block requires all parent child resources to exist on the same bank.
Module TPU Bank Output Resource Usage
Module | TPU Bank A | TPU Bank B | TPU Bank C |
---|---|---|---|
ECM555-48 |
FINJ1 FINJ3 EST1 EST3 |
FINJ2 FINJ4 EST2 EST4 TACH |
N/A |
ECM563-48-0701 |
FINJ1 FINJ3 EST1 EST3 EST5 EST7 H2 |
FINJ1 FINJ3 EST1 EST3 EST5 EST7 TACH ETRIG1 ETRIG2 |
N/A |
ECM563-48-0702 |
FINJ1 FINJ3 EST1 |
FINJ2 FINJ4 EST2 TACH ETRIG1 ETRIG2 |
N/A |
ECM563-48-0703 ECM563-48-0704 ECM563-48-0705 ECM563-48-0801 |
FINJ1 FINJ3 EST1 EST3 EST5 EST7 LSO10 LSO11 |
FINJ2 FINJ4 EST2 EST4 EST6 EST8 TACH |
N/A |
GCM563-48 | LSO7 |
LSO1 LSO2 LSO3 LSO4 LSO5 HSD1 HSD2 H1 ETRIG1 ETRIG2 |
N/A |
HCM563-48 | LSO7 |
LSO1 LSO2 LSO3 LSO4 LSO5 LSO6 LSO8 LSO9 LSO10 LSO11 LSO12 ETRIG1 ETRIG2 |
N/A |
ECM555-80 |
FINJ1 FINJ3 FINJ5 AINJ1 AINJ3 AINJ5 EST1 EST3 EST5 EST7 |
FINJ2 FINJ4 FINJ6 AINJ2 AINJ4 AINJ6 EST2 EST4 EST6 EST8 TACH |
N/A |
ECM565-128 |
FINJ1 FINJ3 FINJ5 FINJ7 FINJ9 FINJ11 EST1 EST3 EST5 EST7 |
FINJ2 FINJ4 FINJ6 FINJ8 FINJ10 FINJ12 EST2 EST4 EST6 EST8 TACH |
ET9 ET10 ET11 ET12 ET13 ET14 ET15 ET16 ETRIG1 H3 |